搜索资源列表
sdram_control_burst
- 精简的sdram读写控制器例子，适用于数据采集系统，verilog，只支持burst方式的读写-streamlined read and write SDRAM controller example, applied to the data acquisition system, Verilog. only supports burst mode read and write
mt48lc2m32b2
- the verilog model of sdram-mt48lc2m32b2 device.-the verilog model of sdram - mt48lc2m32b2 d evice.
sdram_verilog
- 这是使用VERILOG语言，基于MICRON公司的SDRAM开发的SDRAM接口逻辑-verilog This is the use of language, MICRON-based company's development of the SDRAM SDRAM interface logic
CommandResponse
- verilog语言写的sdram控制器—命令响应模块代码，经过测试，逻辑正确，可编译，可综合-verilog language written sdram controller-order response to the code, tested, logically correct, compiler, integrated
sdr_data_path
- SDRAM控制器Verilog员代码，数据链路模块，完成和顶层模块的数据交换-SDRAM controller member Verilog code, data link module, Top module completed and the data exchange
Params
- SDRAM控制器Verilog员代码，设计参数模块，整个模块的所有参数定义-SDRAM controller member Verilog code, design parameter module, the entire module of all parameters defined
control_interface
- SDRAM控制器Verilog员代码，控制接口模块，完成和顶层模块的控制命令的传递-SDRAM controller member Verilog code control interface module, Top module and complete the transfer of control orders
Commandinterface
- SDRAM控制器Verilog员代码，命令生成模块，完成SDRAM控制接口命令的生成-SDRAM controller member Verilog code, order generation module, SDRAM interface complete control orders Generation
Sdram_Control_4Port
- ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。
ddr_ctrl
- verilog hdl coding DDR sdram control for fpga
SDR_4Mx16_HY57V641620HG_verilogl
- Hynix公司8M byte sdr sdram的verilog语言仿真实现。
mem_ctrl.tar
- verilog 写的 memory controller ，可以控制SDRAM SRAM NOR
sdram_ip
- 完成SDRAM的上电配置，状态机编写其读写模块，存储模块，并通过两个异步作为存储和读取的通道(Complete the SDRAM power-on configuration, the state machine to write its read-write module, memory module, and through two asynchronous as a storage and read the channel)
my_sdram_mdl
- 此功能为altera fpga 的sdram 控制器，串口接收与发送(This feature altera fpga sdram controller, serial port to receive and send)
FPGA_SDRAM
- 基于Verilog语言的SDARAM代码(SDARAM code based on Verilog language)
ov7670_sdram_lcd
- ov7670采集图像信息，缓存到SDRAM内部，再输出到lcd显示屏来显示出来。(Ov7670 collects image information, caches inside SDRAM, and then outputs it to the LCD display to display it.)
sdram_640X480_full
- 基于FPGA的640*480的sdram项目，使用verilog语言，教学项目教学项目(The SDRAM project of 640*480 based on FPGA, the use of the Verilog language, the teaching project teaching project)
sdram_test
- 针对黑金AX309开发板的SDRAM控制程序。基于ISE 14.7，语言为Verilog。实测可用。(For the black gold AX309 development board SDRAM control program. Based on ISE 14.7, the language is Verilog. Measured available.)
C5G_SRAM_RTL_Test
- 官网c5板子的SRAM工程，可以直接一直使用。(The SRAM project of official website C5 board can be used directly)
sdram控制
- sdram控制，verilog代码，实现sdram控制底层操作接口